git.techno-innov.fr Git - elec/adapters/raspberrypi/blob - PiSerialPower/PiSerialPower.kicad_pro

   1 {
   2   "board": {
   3     "3dviewports": [],
   4     "design_settings": {
   5       "defaults": {
   6         "board_outline_line_width": 0.381,
   7         "copper_line_width": 0.381,
   8         "copper_text_italic": false,
   9         "copper_text_size_h": 1.524,
  10         "copper_text_size_v": 2.032,
  11         "copper_text_thickness": 0.30479999999999996,
  12         "copper_text_upright": false,
  13         "courtyard_line_width": 0.049999999999999996,
  14         "dimension_precision": 4,
  15         "dimension_units": 3,
  16         "dimensions": {
  17           "arrow_length": 1270000,
  18           "extension_offset": 500000,
  19           "keep_text_aligned": true,
  20           "suppress_zeroes": false,
  21           "text_position": 0,
  22           "units_format": 1
  23         },
  24         "fab_line_width": 0.09999999999999999,
  25         "fab_text_italic": false,
  26         "fab_text_size_h": 1.0,
  27         "fab_text_size_v": 1.0,
  28         "fab_text_thickness": 0.15,
  29         "fab_text_upright": false,
  30         "other_line_width": 0.09999999999999999,
  31         "other_text_italic": false,
  32         "other_text_size_h": 1.0,
  33         "other_text_size_v": 1.0,
  34         "other_text_thickness": 0.15,
  35         "other_text_upright": false,
  36         "pads": {
  37           "drill": 0.0,
  38           "height": 1.34874,
  39           "width": 0.39878
  40         },
  41         "silk_line_width": 0.20065999999999998,
  42         "silk_text_italic": false,
  43         "silk_text_size_h": 1.524,
  44         "silk_text_size_v": 1.524,
  45         "silk_text_thickness": 0.30479999999999996,
  46         "silk_text_upright": false,
  47         "zones": {
  48           "45_degree_only": false,
  49           "min_clearance": 0.19999999999999998
  50         }
  51       },
  52       "diff_pair_dimensions": [],
  53       "drc_exclusions": [],
  54       "meta": {
  55         "filename": "board_design_settings.json",
  56         "version": 2
  57       },
  58       "rule_severities": {
  59         "annular_width": "error",
  60         "clearance": "error",
  61         "copper_edge_clearance": "error",
  62         "courtyards_overlap": "error",
  63         "diff_pair_gap_out_of_range": "error",
  64         "diff_pair_uncoupled_length_too_long": "error",
  65         "drill_out_of_range": "error",
  66         "duplicate_footprints": "warning",
  67         "extra_footprint": "warning",
  68         "footprint_type_mismatch": "error",
  69         "hole_clearance": "error",
  70         "hole_near_hole": "error",
  71         "invalid_outline": "error",
  72         "item_on_disabled_layer": "error",
  73         "items_not_allowed": "error",
  74         "length_out_of_range": "error",
  75         "malformed_courtyard": "error",
  76         "microvia_drill_out_of_range": "error",
  77         "missing_courtyard": "ignore",
  78         "missing_footprint": "warning",
  79         "net_conflict": "warning",
  80         "npth_inside_courtyard": "ignore",
  81         "padstack": "error",
  82         "pth_inside_courtyard": "ignore",
  83         "shorting_items": "error",
  84         "silk_over_copper": "warning",
  85         "silk_overlap": "warning",
  86         "skew_out_of_range": "error",
  87         "through_hole_pad_without_hole": "error",
  88         "too_many_vias": "error",
  89         "track_dangling": "warning",
  90         "track_width": "error",
  91         "tracks_crossing": "error",
  92         "unconnected_items": "error",
  93         "unresolved_variable": "error",
  94         "via_dangling": "warning",
  95         "zone_has_empty_net": "error",
  96         "zones_intersect": "error"
  97       },
  98       "rule_severitieslegacy_courtyards_overlap": true,
  99       "rule_severitieslegacy_no_courtyard_defined": false,
 100       "rules": {
 101         "allow_blind_buried_vias": false,
 102         "allow_microvias": false,
 103         "max_error": 0.005,
 104         "min_clearance": 0.0,
 105         "min_copper_edge_clearance": 0.1905,
 106         "min_hole_clearance": 0.25,
 107         "min_hole_to_hole": 0.25,
 108         "min_microvia_diameter": 0.508,
 109         "min_microvia_drill": 0.127,
 110         "min_silk_clearance": 0.0,
 111         "min_through_hole_diameter": 0.381,
 112         "min_track_width": 0.2032,
 113         "min_via_annular_width": 0.049999999999999996,
 114         "min_via_diameter": 0.508,
 115         "use_height_for_length_calcs": true
 116       },
 117       "track_widths": [],
 118       "via_dimensions": [],
 119       "zones_allow_external_fillets": false,
 120       "zones_use_no_outline": true
 121     },
 122     "layer_presets": [],
 123     "viewports": []
 124   },
 125   "boards": [],
 126   "cvpcb": {
 127     "equivalence_files": []
 128   },
 129   "erc": {
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 131     "meta": {
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 303     ],
 304     "rule_severities": {
 305       "bus_definition_conflict": "error",
 306       "bus_entry_needed": "error",
 307       "bus_to_bus_conflict": "error",
 308       "bus_to_net_conflict": "error",
 309       "conflicting_netclasses": "error",
 310       "different_unit_footprint": "error",
 311       "different_unit_net": "error",
 312       "duplicate_reference": "error",
 313       "duplicate_sheet_names": "error",
 314       "endpoint_off_grid": "warning",
 315       "extra_units": "error",
 316       "global_label_dangling": "warning",
 317       "hier_label_mismatch": "error",
 318       "label_dangling": "error",
 319       "lib_symbol_issues": "warning",
 320       "missing_bidi_pin": "warning",
 321       "missing_input_pin": "warning",
 322       "missing_power_pin": "error",
 323       "missing_unit": "warning",
 324       "multiple_net_names": "warning",
 325       "net_not_bus_member": "warning",
 326       "no_connect_connected": "warning",
 327       "no_connect_dangling": "warning",
 328       "pin_not_connected": "error",
 329       "pin_not_driven": "error",
 330       "pin_to_pin": "warning",
 331       "power_pin_not_driven": "error",
 332       "similar_labels": "warning",
 333       "simulation_model_issue": "ignore",
 334       "unannotated": "error",
 335       "unit_value_mismatch": "error",
 336       "unresolved_variable": "error",
 337       "wire_dangling": "error"
 338     }
 339   },
 340   "libraries": {
 341     "pinned_footprint_libs": [],
 342     "pinned_symbol_libs": []
 343   },
 344   "meta": {
 345     "filename": "PiSerialPower.kicad_pro",
 346     "version": 1
 347   },
 348   "net_settings": {
 349     "classes": [
 350       {
 351         "bus_width": 12,
 352         "clearance": 0.19304,
 353         "diff_pair_gap": 0.25,
 354         "diff_pair_via_gap": 0.25,
 355         "diff_pair_width": 0.25,
 356         "line_style": 0,
 357         "microvia_diameter": 0.508,
 358         "microvia_drill": 0.127,
 359         "name": "Default",
 360         "pcb_color": "rgba(0, 0, 0, 0.000)",
 361         "schematic_color": "rgba(0, 0, 0, 0.000)",
 362         "track_width": 0.2032,
 363         "via_diameter": 0.508,
 364         "via_drill": 0.381,
 365         "wire_width": 6
 366       },
 367       {
 368         "bus_width": 12,
 369         "clearance": 0.19304,
 370         "diff_pair_gap": 0.25,
 371         "diff_pair_via_gap": 0.25,
 372         "diff_pair_width": 0.25,
 373         "line_style": 0,
 374         "microvia_diameter": 0.508,
 375         "microvia_drill": 0.127,
 376         "name": "Alim",
 377         "pcb_color": "rgba(0, 0, 0, 0.000)",
 378         "schematic_color": "rgba(0, 0, 0, 0.000)",
 379         "track_width": 0.3048,
 380         "via_diameter": 0.889,
 381         "via_drill": 0.508,
 382         "wire_width": 6
 383       }
 384     ],
 385     "meta": {
 386       "version": 3
 387     },
 388     "net_colors": null,
 389     "netclass_assignments": null,
 390     "netclass_patterns": [
 391       {
 392         "netclass": "Alim",
 393         "pattern": "+3.3V"
 394       },
 395       {
 396         "netclass": "Alim",
 397         "pattern": "+5C"
 398       },
 399       {
 400         "netclass": "Alim",
 401         "pattern": "+5V"
 402       },
 403       {
 404         "netclass": "Alim",
 405         "pattern": "+VCC"
 406       },
 407       {
 408         "netclass": "Alim",
 409         "pattern": "+Vbatt"
 410       },
 411       {
 412         "netclass": "Alim",
 413         "pattern": "/3V_USBIO"
 414       },
 415       {
 416         "netclass": "Alim",
 417         "pattern": "/5VInd"
 418       },
 419       {
 420         "netclass": "Alim",
 421         "pattern": "/5V_USB"
 422       },
 423       {
 424         "netclass": "Alim",
 425         "pattern": "/CMD_FAN"
 426       },
 427       {
 428         "netclass": "Alim",
 429         "pattern": "/CMD_FAN_Filt"
 430       },
 431       {
 432         "netclass": "Alim",
 433         "pattern": "/Ch1"
 434       },
 435       {
 436         "netclass": "Alim",
 437         "pattern": "/Ch2"
 438       },
 439       {
 440         "netclass": "Alim",
 441         "pattern": "/USB_5V"
 442       },
 443       {
 444         "netclass": "Alim",
 445         "pattern": "/USB_DM"
 446       },
 447       {
 448         "netclass": "Alim",
 449         "pattern": "/USB_DP"
 450       },
 451       {
 452         "netclass": "Alim",
 453         "pattern": "DGND"
 454       }
 455     ]
 456   },
 457   "pcbnew": {
 458     "last_paths": {
 459       "gencad": "",
 460       "idf": "",
 461       "netlist": "PiSerialPower.net",
 462       "specctra_dsn": "",
 463       "step": "",
 464       "vrml": ""
 465     },
 466     "page_layout_descr_file": ""
 467   },
 468   "schematic": {
 469     "annotate_start_num": 0,
 470     "drawing": {
 471       "dashed_lines_dash_length_ratio": 12.0,
 472       "dashed_lines_gap_length_ratio": 3.0,
 473       "default_line_thickness": 6.0,
 474       "default_text_size": 60.0,
 475       "field_names": [],
 476       "intersheets_ref_own_page": false,
 477       "intersheets_ref_prefix": "",
 478       "intersheets_ref_short": false,
 479       "intersheets_ref_show": false,
 480       "intersheets_ref_suffix": "",
 481       "junction_size_choice": 3,
 482       "label_size_ratio": 0.25,
 483       "pin_symbol_size": 0.0,
 484       "text_offset_ratio": 0.08
 485     },
 486     "legacy_lib_dir": "",
 487     "legacy_lib_list": [],
 488     "meta": {
 489       "version": 1
 490     },
 491     "net_format_name": "Pcbnew",
 492     "ngspice": {
 493       "fix_include_paths": true,
 494       "fix_passive_vals": false,
 495       "meta": {
 496         "version": 0
 497       },
 498       "model_mode": 0,
 499       "workbook_filename": ""
 500     },
 501     "page_layout_descr_file": "../../../Lib/pagelayout.kicad_wks",
 502     "plot_directory": "",
 503     "spice_adjust_passive_values": false,
 504     "spice_current_sheet_as_root": false,
 505     "spice_external_command": "spice \"%I\"",
 506     "spice_model_current_sheet_as_root": true,
 507     "spice_save_all_currents": false,
 508     "spice_save_all_voltages": false,
 509     "subpart_first_id": 65,
 510     "subpart_id_separator": 0
 511   },
 512   "sheets": [
 513     [
 514       "16503fa5-5c72-4dea-917b-7c99553026d5",
 515       ""
 516     ]
 517   ],
 518   "text_variables": {}
 519 }