}
}
+/* Configure the timer as PWM. Call to timer-specific function */
void timer_pwm_config(uint8_t timer_num, const struct lpc_timer_pwm_config* conf)
{
if (timer_num >= NUM_TIMERS)
/* Power up a timer.
- * clkrate is a divider of the main clock frequency chosen for your application
- * as it will be used to divide the main clock to get the prescaler value.
+ * clkrate is the desired timer clock rate. It will be used to divide the main clock
+ * to get the timer prescaler value.
* Set clkrate to 0 to disable the prescaler.
* callback is the interrupt callback for this timer.
*/
};
+/*******************************************************************************/
/* Configurations */
+
+/* PWM
+ * This structure is used for the timer_pwm_config() function.
+ * nb_channels is the number of PWM channels used
+ * outputs_initial_state defines whether the outputs start low or high at the beginning of
+ * the PWM cycle. Support for this depends on the target. Some will allow a different
+ * state for each output (then use one bit for each output, bit 0 for output 0, ...) while
+ * some will require the same initial state for all output (then outputs_initial_state
+ * can be either 0 for "low" or any positive value for "high")
+ * outputs[] is the list of outputs / channels corresponding to each 'match_values'
+ * period is the PWM cycle period, in timer clock cycles. It is the value to wich the timer
+ * will count.
+ * match_values[] control the PWM channels duty-cycle. They are the timer values at wich
+ * the corresponding outputs will toggle. They must be lower than or equal to the period
+ * value.
+ */
struct lpc_timer_pwm_config {
uint8_t nb_channels;
uint8_t outputs_initial_state;
+ uint8_t outputs[MAX_CHANNELS];
uint32_t period;
uint32_t match_values[MAX_CHANNELS];
- uint8_t outputs[MAX_CHANNELS];
};
+/*******************************************************************************/
+/* Operation structures, not for use by user programms */
struct common_operations {
/* Running control */
void (*start)(uint8_t);
/* Change the match value of a single timer channel */
void timer_set_match(uint8_t timer_num, uint8_t channel, uint32_t val);
+/* PWM configuration in order to use the timer as a PWM controller.
+ * For the pwm_conf structure, refer to it's definition above..
+ * The Timer must be "on" (call timer_on() for this timer before the call to
+ * timer_pwm_config(), with the disired clock rate, which will define the
+ * length of a timer clock cycle, which is the base for the timer period
+ * definition).
+ * The timer will not be started. User code must call timer_start() in order
+ * to start the PWM.
+ */
void timer_pwm_config(uint8_t timer_num, const struct lpc_timer_pwm_config* pwm_conf);
/* Init */
/* Power up a timer.
- * clkrate is a divider of the main clock frequency chosen for your application
- * as it will be used to divide the main clock to get the prescaler value.
+ * clkrate is the desired timer clock rate. It will be used to divide the main clock
+ * to get the timer prescaler value.
* Set clkrate to 0 to disable the prescaler.
* callback is used for all the possible timer interrupts (activated using the
* config field in timer_config struct upon timer setup)