New version (v02) of Scialys micro-controller board.

diff --git a/Scialys_uC/Scialys_uC.kicad_pcb b/Scialys_uC/Scialys_uC.kicad_pcb
index 6c89e92..64bfb6d 100644 (file)
--- a/Scialys_uC/Scialys_uC.kicad_pcb
+++ b/Scialys_uC/Scialys_uC.kicad_pcb
@@ -60,7 +60,6 @@
     (pad_drill 1.6)
     (pad_to_mask_clearance 0.05)
     (solder_mask_min_width 0.05)
-    (pad_to_paste_clearance -0.1)
     (aux_axis_origin 0 0)
     (visible_elements FFFFEF79)
     (pcbplotparams

diff --git a/Scialys_uC/Scialys_uC.net b/Scialys_uC/Scialys_uC.net
index 0c11d7c..6f0c8a5 100644 (file)
--- a/Scialys_uC/Scialys_uC.net
+++ b/Scialys_uC/Scialys_uC.net
@@ -1,14 +1,14 @@
 (export (version D)
   (design
     (source /opt/domotab/Schemas/Scialys_uC/Scialys_uC.sch)
-    (date "mar. 08 nov. 2016 12:23:01 CET")
+    (date "lun. 21 nov. 2016 19:52:08 CET")
     (tool "Eeschema 4.0.2+dfsg1-stable")
     (sheet (number 1) (name /) (tstamps /)
       (title_block
         (title "Scialys uC")
         (company Techno-Innov)
-        (rev 0.1)
-        (date 2016-09-08)
+        (rev 0.2)
+        (date 2016-11-08)
         (source Scialys_uC.sch)
         (comment (number 1) (value "Licence : Creative Commons  -   CC - By - SA - NC"))
         (comment (number 2) (value "Author : Nathael Pajani - nathael.pajani@techno-innov.fr"))

diff --git a/Scialys_uC/Scialys_uC.pro b/Scialys_uC/Scialys_uC.pro
index 113abce..486fba7 100644 (file)
--- a/Scialys_uC/Scialys_uC.pro
+++ b/Scialys_uC/Scialys_uC.pro
@@ -1,4 +1,4 @@
-update=mar. 19 juil. 2016 18:22:10 CEST
+update=mer. 30 nov. 2016 13:38:05 CET
 version=1
 last_client=kicad
 [cvpcb]