return ret;
}
/* Erase sector */
- return iap_erase_flash_sectors(sector, sector);
+ return iap_erase_flash_sectors(sector, sector);
}
/* Flash a binary image chunk to a sector. */
}
}
-/* Read the conversion from the given channel (0 to 7)
+/* Read the conversion from the given channel (0 to 7)
* This function reads the conversion value directly in the data register and
* always returns a value.
* Return 0 if the value is a new one and no overrun occured.
/****************************************************************************
* drivers/countertimers.c
*
- * Copyright 2012 Nathael Pajani <nathael.pajani@ed3l.fr>
+ * Copyright 2016 Nathael Pajani <nathael.pajani@ed3l.fr>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
/* These are local to our file */
struct countertimer_device
{
- struct lpc_timer* regs;
+ struct lpc_timer* regs;
uint32_t power_bit;
uint8_t irq;
uint8_t configured;
.irq = TIMER0_IRQ,
.configured = 0,
.callback = NULL,
- },
+ },
{
.regs = LPC_TMR16B1,
.power_bit = LPC_SYS_ABH_CLK_CTRL_CT16B1,
.irq = TIMER1_IRQ,
.configured = 0,
.callback = NULL,
- },
+ },
{
.regs = LPC_TMR32B0,
.power_bit = LPC_SYS_ABH_CLK_CTRL_CT32B0,
.irq = TIMER2_IRQ,
.configured = 0,
.callback = NULL,
- },
+ },
{
.regs = LPC_TMR32B1,
.power_bit = LPC_SYS_ABH_CLK_CTRL_CT32B1,
.irq = TIMER3_IRQ,
.configured = 0,
.callback = NULL,
- },
+ },
};
/* Handlers */
/* Activate the SSP clock (maybe divide main clock) */
switch (ssp_num) {
- case 0 :
+ case 0:
sys_config->ssp0_clk_div = pclk_div;
break;
}
/****************************************************************************
* drivers/timers.c
*
- * Copyright 2012 Nathael Pajani <nathael.pajani@ed3l.fr>
+ * Copyright 2016 Nathael Pajani <nathael.pajani@ed3l.fr>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
{
uint32_t oldval;
lpc_disable_irq();
- dsb();
+ dsb();
oldval = *addr;
*addr = value;
- dsb();
+ dsb();
lpc_enable_irq();
return oldval;
}
/* Remove the lock */
static inline void sync_lock_release(volatile uint32_t *addr)
{
- *addr = 0;
- dsb();
+ *addr = 0;
+ dsb();
}
/* IRQ disabled version : If lock is acquired (old value is 0) IRQ are
- * disabled when the call returns
+ * disabled when the call returns
* Returns the old value after the new value has been set.
*/
static inline uint32_t irq_sync_lock_test_and_set(volatile uint32_t *addr, uint32_t value)
{
uint32_t oldval;
lpc_disable_irq();
- dsb();
+ dsb();
oldval = *addr;
*addr = value;
- dsb();
+ dsb();
if (oldval) {
lpc_enable_irq();
}
/* Remove the lock */
static inline void irq_sync_lock_release(volatile uint32_t *addr)
{
- *addr = 0;
- dsb();
+ *addr = 0;
+ dsb();
lpc_enable_irq();
}
#define WDT_CLK_IRC 0
#define WDT_CLK_WDTCLK 1
struct wdt_config {
- /* clk_sel is either 0 (IRC) or 1 (WDTCLK). The corresponding clock source will be powered on. */
+ /* clk_sel is either 0 (IRC) or 1 (WDTCLK). The corresponding clock source will be powered on. */
uint8_t clk_sel;
uint8_t intr_mode_only; /* If set to 1, a watchdog timeout will trigger an interrupt instead of a reset */
void (*callback)(void);
/* Counter Timer */
/***************************************************************************** */
/* Timers driver for the integrated timers of the LPC122x.
- * The LPC122x Has two 16bits timers and two 32bits timers.
+ * The LPC122x has two 16bits timers and two 32bits timers.
* Refer to LPC122x documentation (UM10441.pdf) for more information.
*/
#define NUM_COUNTERTIMERS 4
* lib/uprintf.c
*
* UART printf
- *
+ *
* Copyright 2012 Nathael Pajani <nathael.pajani@ed3l.fr>
*
* This program is free software: you can redistribute it and/or modify
* lib/vsprintf.c
*
* Code based on lib/vsprintf.c from linux kernel.
- *
+ *
* Copyright 2012 Nathael Pajani <nathael.pajani@ed3l.fr>
*
* This program is free software: you can redistribute it and/or modify
/* Parse format string */
while ((buf < end) && *fmt) {
- uint32_t flags = 0;
- uint32_t width = 0;
+ uint32_t flags = 0;
+ uint32_t width = 0;
if (*fmt != '%') {
*buf++ = *fmt++;