From 3e02aa786ac0269bedf42a2e1214eebfb9101e03 Mon Sep 17 00:00:00 2001
From: Nathael Pajani <nathael.pajani@ed3l.fr>
Date: Thu, 7 Nov 2013 01:30:55 +0100
Subject: [PATCH] Change to config_gpio function Use port number and pin number
 as args and get the right pointer from corresponding table.

---
 drivers/gpio.c         | 87 +++++++++++++++++++++++++++++++++++++++++-
 include/drivers/gpio.h |  2 +-
 2 files changed, 87 insertions(+), 2 deletions(-)

diff --git a/drivers/gpio.c b/drivers/gpio.c
index 1764fea..654bd2a 100644
--- a/drivers/gpio.c
+++ b/drivers/gpio.c
@@ -33,9 +33,94 @@
 
 /***************************************************************************** */
 /*   Public access to GPIO setup   */
+#define PORT0_NB_PINS 32
+#define PORT1_NB_PINS 7
+#define PORT2_NB_PINS 16
+static volatile uint32_t* gpio_regs_handles_port0[PORT0_NB_PINS] = {
+	&(LPC_IO_CONTROL->pio0_0),
+	&(LPC_IO_CONTROL->pio0_1),
+	&(LPC_IO_CONTROL->pio0_2),
+	&(LPC_IO_CONTROL->pio0_3),
+	&(LPC_IO_CONTROL->pio0_4),
+	&(LPC_IO_CONTROL->pio0_5),
+	&(LPC_IO_CONTROL->pio0_6),
+	&(LPC_IO_CONTROL->pio0_7),
+	&(LPC_IO_CONTROL->pio0_8),
+	&(LPC_IO_CONTROL->pio0_9),
+	&(LPC_IO_CONTROL->pio0_10),
+	&(LPC_IO_CONTROL->pio0_11),
+	&(LPC_IO_CONTROL->pio0_12),
+	&(LPC_IO_CONTROL->pio0_13),
+	&(LPC_IO_CONTROL->pio0_14),
+	&(LPC_IO_CONTROL->pio0_15),
+	&(LPC_IO_CONTROL->pio0_16),
+	&(LPC_IO_CONTROL->pio0_17),
+	&(LPC_IO_CONTROL->pio0_18),
+	&(LPC_IO_CONTROL->pio0_19),
+	&(LPC_IO_CONTROL->pio0_20),
+	&(LPC_IO_CONTROL->pio0_21),
+	&(LPC_IO_CONTROL->pio0_22),
+	&(LPC_IO_CONTROL->pio0_23),
+	&(LPC_IO_CONTROL->pio0_24),
+	&(LPC_IO_CONTROL->pio0_25),
+	&(LPC_IO_CONTROL->pio0_26),
+	&(LPC_IO_CONTROL->pio0_27),
+	&(LPC_IO_CONTROL->pio0_28),
+	&(LPC_IO_CONTROL->pio0_29),
+	&(LPC_IO_CONTROL->pio0_30),
+	&(LPC_IO_CONTROL->pio0_31),
+};
+static volatile uint32_t* gpio_regs_handles_port1[PORT1_NB_PINS] = {
+	&(LPC_IO_CONTROL->pio1_0),
+	&(LPC_IO_CONTROL->pio1_1),
+	&(LPC_IO_CONTROL->pio1_2),
+	&(LPC_IO_CONTROL->pio1_3),
+	&(LPC_IO_CONTROL->pio1_4),
+	&(LPC_IO_CONTROL->pio1_5),
+	&(LPC_IO_CONTROL->pio1_6),
+};
+static volatile uint32_t* gpio_regs_handles_port2[PORT2_NB_PINS] = {
+	&(LPC_IO_CONTROL->pio2_0),
+	&(LPC_IO_CONTROL->pio2_1),
+	&(LPC_IO_CONTROL->pio2_2),
+	&(LPC_IO_CONTROL->pio2_3),
+	&(LPC_IO_CONTROL->pio2_4),
+	&(LPC_IO_CONTROL->pio2_5),
+	&(LPC_IO_CONTROL->pio2_6),
+	&(LPC_IO_CONTROL->pio2_7),
+	&(LPC_IO_CONTROL->pio2_8),
+	&(LPC_IO_CONTROL->pio2_9),
+	&(LPC_IO_CONTROL->pio2_10),
+	&(LPC_IO_CONTROL->pio2_11),
+	&(LPC_IO_CONTROL->pio2_12),
+	&(LPC_IO_CONTROL->pio2_13),
+	&(LPC_IO_CONTROL->pio2_14),
+	&(LPC_IO_CONTROL->pio2_15),
+};
 
-void config_gpio(volatile uint32_t* handle, uint32_t mode)
+void config_gpio(uint8_t port, uint8_t pin, uint32_t mode)
 {
+	volatile uint32_t* handle = NULL;
+
+	switch (port) {
+		case 0:
+			if (pin >= PORT0_NB_PINS)
+				return;
+			handle = gpio_regs_handles_port0[pin];
+			break;
+		case 1:
+			if (pin >= PORT1_NB_PINS)
+				return;
+			handle = gpio_regs_handles_port1[pin];
+			break;
+		case 2:
+			if (pin >= PORT2_NB_PINS)
+				return;
+			handle = gpio_regs_handles_port2[pin];
+			break;
+		default:
+			return;
+	}
 	/* Make sure IO_Config is clocked */
 	io_config_clk_on();
 	*handle = mode;
diff --git a/include/drivers/gpio.h b/include/drivers/gpio.h
index 03ac3f8..cafd106 100644
--- a/include/drivers/gpio.h
+++ b/include/drivers/gpio.h
@@ -29,7 +29,7 @@
 /*   Public access to GPIO setup   */
 
 
-void config_gpio(volatile uint32_t* handle, uint32_t mode);
+void config_gpio(uint8_t port, uint8_t pin, uint32_t mode);
 
 void gpio_on(void);
 void gpio_off(void);
-- 
2.43.0