From 73d74cff41aaea25e3617b8175fa189763af1f94 Mon Sep 17 00:00:00 2001 From: Nathael Pajani Date: Thu, 28 Aug 2014 19:34:47 +0200 Subject: [PATCH] Sometimes GCC needs Low registers instead of general ones, but we need to tell him he can use them. Maybe necessary in other places, but at least fixes the problem i have on my test system. Special thanks to cyprien, once again ! --- include/core/lpc_core_cm0.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/core/lpc_core_cm0.h b/include/core/lpc_core_cm0.h index 96131bd..90311de 100644 --- a/include/core/lpc_core_cm0.h +++ b/include/core/lpc_core_cm0.h @@ -148,21 +148,21 @@ static inline void set_fault_mask(uint32_t mask) static inline uint32_t double_byte_swap_16(volatile uint32_t value) { uint32_t result = 0; - __asm volatile ("rev16 %0, %1" : "=r" (result) : "r" (value)); + __asm volatile ("rev16 %0, %1" : "=l" (result) : "l" (value)); return result; } /* Change endianness of a 16-bit halfword */ static inline uint32_t byte_swap_16(volatile uint16_t value) { uint32_t result = 0; - __asm volatile ("rev16 %0, %1" : "=r" (result) : "r" (value)); + __asm volatile ("rev16 %0, %1" : "=l" (result) : "l" (value)); return (result & 0xFFFF); } /* Change endianness of a 32-bit word */ static inline uint32_t byte_swap_32(volatile uint32_t value) { uint32_t result = 0; - __asm volatile ("rev %0, %1" : "=r" (result) : "r" (value)); + __asm volatile ("rev %0, %1" : "=l" (result) : "l" (value)); return result; } -- 2.43.0