From 8c649d9c775bbd655643e83be0bca16709be890c Mon Sep 17 00:00:00 2001 From: Nathael Pajani Date: Sat, 15 Jun 2013 02:48:13 +0200 Subject: [PATCH] Add support for different modes and possible config of each uart in a different one. --- drivers/serial.c | 7 +++++-- include/core/lpc_regs_12xx.h | 6 ++++++ 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/serial.c b/drivers/serial.c index 53cf5aa..9ae5d78 100644 --- a/drivers/serial.c +++ b/drivers/serial.c @@ -37,6 +37,7 @@ struct uart_device uint32_t num; struct lpc_uart* regs; uint32_t baudrate; + uint32_t config; /* Output buffer */ volatile char out_buff[SERIAL_OUT_BUFF_SIZE]; @@ -53,6 +54,7 @@ static struct uart_device uarts[NUM_UARTS] = { .num = 0, .regs = (struct lpc_uart*)LPC_UART_0, .baudrate = 0, + .config = (LPC_UART_8BIT | LPC_UART_NO_PAR | LPC_UART_1STOP), .out_buff = {0}, .sending = 0, .out_lock = 0, @@ -61,6 +63,7 @@ static struct uart_device uarts[NUM_UARTS] = { .num = 1, .regs = (struct lpc_uart*)LPC_UART_1, .baudrate = 0, + .config = (LPC_UART_8BIT | LPC_UART_NO_PAR | LPC_UART_1STOP), .out_buff = {0}, .sending = 0, .out_lock = 0, @@ -207,8 +210,8 @@ static uint32_t uart_mode_setup(uint32_t uart_num) { struct lpc_uart* uart = uarts[uart_num].regs; /* Get the right registers */ uint32_t status = 0; - /* Set up UART mode : 8n1 */ - uart->line_ctrl = (LPC_UART_8BIT | LPC_UART_NO_PAR | LPC_UART_1STOP); + /* Set up UART mode */ + uart->line_ctrl = uarts[uart_num].config;; /* Clear all fifo, reset and enable them */ /* Note : fifo trigger level is one bit */ uart->ctrl.fifo_ctrl = (LPC_UART_FIFO_EN | LPC_UART_TX_CLR | LPC_UART_RX_CLR); diff --git a/include/core/lpc_regs_12xx.h b/include/core/lpc_regs_12xx.h index 3ccdb10..4629a45 100644 --- a/include/core/lpc_regs_12xx.h +++ b/include/core/lpc_regs_12xx.h @@ -502,9 +502,15 @@ struct lpc_uart #define LPC_UART_1 ((struct lpc_uart *) LPC_UART1_BASE) /* Line Control Register */ +#define LPC_UART_5BIT (0x00 << 0) +#define LPC_UART_6BIT (0x01 << 0) +#define LPC_UART_7BIT (0x02 << 0) #define LPC_UART_8BIT (0x03 << 0) #define LPC_UART_1STOP (0x00 << 2) +#define LPC_UART_2STOP (0x01 << 2) #define LPC_UART_NO_PAR (0x00 << 3) +#define LPC_UART_ODD_PAR ((0x01 << 3) | (0x00 << 4)) +#define LPC_UART_EVEN_PAR ((0x01 << 3) | (0x01 << 4)) #define LPC_UART_ENABLE_DLAB (0x01 << 7) /* FIFO Control Register */ #define LPC_UART_FIFO_EN (0x01 << 0) -- 2.43.0