From bbbcf39f0c898bb6acd1093e7a47921c75c4d36e Mon Sep 17 00:00:00 2001 From: Nathael Pajani Date: Wed, 13 Mar 2013 16:27:08 +0100 Subject: [PATCH] Adding Byte swap instructions support. --- include/core/lpc_core_cm0.h | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/include/core/lpc_core_cm0.h b/include/core/lpc_core_cm0.h index 623f333..1332e76 100644 --- a/include/core/lpc_core_cm0.h +++ b/include/core/lpc_core_cm0.h @@ -141,6 +141,35 @@ static inline void set_fault_mask(uint32_t mask) +/*******************************************************************************/ +/* Byte swap instructions */ +/*******************************************************************************/ +/* Swap bytes of each 16-bit halfword in a 32-bit word, keeping halfword order */ +static inline uint32_t double_byte_swap_16(volatile uint32_t value) +{ + uint32_t result = 0; + __asm volatile ("rev16 %0, %1" : "=r" (result) : "r" (value)); + return result; +} +/* Change endianness of a 16-bit halfword */ +static inline uint32_t byte_swap_16(volatile uint16_t value) +{ + uint32_t result = 0; + __asm volatile ("rev16 %0, %1" : "=r" (result) : "r" (value)); + return (result & 0xFFFF); +} +/* Change endianness of a 32-bit word */ +static inline uint32_t byte_swap_32(volatile uint32_t value) +{ + uint32_t result = 0; + __asm volatile ("rev %0, %1" : "=r" (result) : "r" (value)); + return result; +} + + + + + /*******************************************************************************/ /* Interrupts */ /*******************************************************************************/ -- 2.43.0